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IEICE Trans

Keyword : CPI stack

Critical Path Based Microarchitectural Bottleneck Analysis for Out-of-Order Execution
Teruo TANIMOTO Takatsugu ONO Koji INOUE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/06/01
Vol. E102-A  No. 6 ; pp. 758-766
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Systems)
Category: 
Keyword: 
critical path analysis, Out-of-Order processor, CPI stack, bottleneck analysis, 
 Summary | Full Text:PDF