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IEICE Trans

Zuocheng XING

Architecture and Implementation of a Reduced EPIC Processor
Jun GAO Minxuan ZHANG Zuocheng XING Chaochao FENG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/01/01
Vol. E96-D  No. 1  pp. 9-18
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
ILP, EPIC, IA-64, processor architecture, hardware implementation, 
 Summary | Full Text:PDF