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IEICE Trans

Zhong-Zhen WU

Synthesis for Multiple Input Wire Replacement of a Gate: Theorems and Applications
Shih-Chieh CHANG Zhong-Zhen WU Sheng-Hong TU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/12/01
Vol. E84-A  No. 12  pp. 3116-3124
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
logic synthesis, redundant wire, alternative wire, mandatory assignment, layout synthesis, 
 Summary | Full Text:PDF