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IEICE Trans

Zhijie ZHAN

A 0.13 mJ/Prediction CIFAR-100 Fully Synthesizable Raster-Scan-Based Wired-Logic Processor in 16-nm FPGA
Dongzhu LI Zhijie ZHAN Rei SUMIKAWA Mototsugu HAMADA Atsutake KOSUGE Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2024/06/01
Vol. E107-C  No. 6  pp. 155-162
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
wired-logic, non-linear neural network, FGPA, high-level synthesis, software and hardware co-design, 
 Summary | Full Text:PDF