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IEICE Trans

Yutaka ISHII

Low-Temperature Gate Insulator for Poly-Si Thin Film Transistors by Combination of Photo-Oxidation and Plasma Enhanced Chemical Vapor Deposition Using Tetraethylorthosilicate and O2 Gases
Yukihiko NAKATA Tetsuya OKAMOTO Toshimasa HAMADA Takashi ITOGA Yutaka ISHII 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/11/01
Vol. E85-C  No. 11  pp. 1849-1853
Type of Manuscript:  Special Section PAPER (Special Issue on Electronic Displays)
Category: Active Matrix Displays
Keyword: 
oxidation, poly-Si, TFT, gate insulator, SiO2, 
 Summary | Full Text:PDF