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| Yuichiro SHIBATA
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Design Parameter Modeling for Design Space Exploration of Real-Time HDR Synthesis on FPGA
Masahiro NISHIMURA Taito MANABE Yuichiro SHIBATA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2026/03/01
Vol. E109-A
No. 3
pp. 571-580
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
FPGA, HDR synthesis, design space exploration, | | | Summary | Full Text:PDF | |
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Pipelined ADPCM Compression for HDR Synthesis on an FPGA
Masahiro NISHIMURA Taito MANABE Yuichiro SHIBATA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2024/03/01
Vol. E107-A
No. 3
pp. 531-539
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Design Technology and CAD
Keyword:
FPGA, HDR synthesis, image compression, | | | Summary | Full Text:PDF | |
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Real-Time Image-Based Vibration Extraction with Memory-Efficient Optical Flow and Block-Based Adaptive Filter
Taito MANABE Yuichiro SHIBATA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2023/03/01
Vol. E106-A
No. 3
pp. 504-513
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
optical flow, feature matching, BMFLC, FPGA, real-time, | | | Summary | Full Text:PDF | |
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FPGA Implementation of a Stream-Based Real-Time Hardware Line Segment Detector
Taito MANABE Taichi KATAYAMA Yuichiro SHIBATA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2022/03/01
Vol. E105-A
No. 3
pp. 468-477
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
line detection, stream processing, FPGA, real-time, | | | Summary | Full Text:PDF | |
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FPGA Implementation of a Real-Time Super-Resolution System Using Flips and an RNS-Based CNN
Taito MANABE Yuichiro SHIBATA Kiyoshi OGURI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2018/12/01
Vol. E101-A
No. 12
pp. 2280-2289
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
FPGA, super-resolution, real-time, CNN, RNS, | | | Summary | Full Text:PDF | |
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