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IEICE Trans

Yousuke HAGIWARA

Clock Driver Design for Low-Power High-Speed 90-nm CMOS Register Array
Tadayoshi ENOMOTO Suguru NAGAYAMA Hiroaki SHIKANO Yousuke HAGIWARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4  pp. 553-561
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories)
Category: 
Keyword: 
power dissipation, CMOS, clock, register, 
 Summary | Full Text:PDF