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IEICE Trans

Yoshifumi MATSUSHITA

Routing Methodology for Minimizing Crosstalk in SoC
Takashi YAMADA Atsushi SAKAI Yoshifumi MATSUSHITA Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/09/01
Vol. E86-A  No. 9  pp. 2347-2356
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
SoC, signal integrity, crosstalk, interconnect, timing analysis, 
 Summary | Full Text:PDF
Pre-Route Power Analysis Techniques for SoC
Takashi YAMADA Takeshi SAKAMOTO Shinji FURUICHI Mamoru MUKUNO Yoshifumi MATSUSHITA Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/03/01
Vol. E86-A  No. 3  pp. 686-692
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
SoC, power analysis, gate-level, custom wire load model, 
 Summary | Full Text:PDF
Low-Power Architecture of a Digital Matched Filter for Direct-Sequence Spread-Spectrum Systems
Takashi YAMADA Shoji GOTO Norihisa TAKAYAMA Yoshifumi MATSUSHITA Yasoo HARADA Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/01/01
Vol. E86-C  No. 1  pp. 79-88
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
matched filter, spread-spectrum, WCDMA, VLSI, low power, 
 Summary | Full Text:PDF