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IEICE Trans

Yoshiaki YOKOYAMA

Resource and Performance Evaluations of Fixed Point QRD-RLS Systolic Array through FPGA Implementation
Yoshiaki YOKOYAMA Minseok KIM Hiroyuki ARAI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2008/04/01
Vol. E91-B  No. 4  pp. 1068-1075
Type of Manuscript:  PAPER
Category: Wireless Communication Technologies
Keyword: 
systolic array, QR decomposition, RLS, CORDIC, FPGA, 
 Summary | Full Text:PDF