Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2007/10/01
Vol. E90-C
No. 10
pp. 1919-1926
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Technology toward Frontiers of New Market)
Category: Low-Power and High-Performance VLSI Circuit Technology
Keyword:
variation-aware, reconfigurable device, FPGA, yield, DFM, |
48 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations