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IEICE Trans

Yimeng ZHANG

Self-Cascode MOSFET with a Self-Biased Body Effect for Ultra-Low-Power Voltage Reference Generator
Hao ZHANG Mengshu HUANG Yimeng ZHANG Tsutomu YOSHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/06/01
Vol. E96-C  No. 6  pp. 859-866
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
voltage reference, subthreshold, self-cascode, body effect, ultra-low power, low output, 
 Summary | Full Text:PDF
An Efficient Dual Charge Pump Circuit Using Charge Sharing Clock Scheme
Mengshu HUANG Yimeng ZHANG Tsutomu YOSHIHARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/02/01
Vol. E95-A  No. 2  pp. 439-446
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
charge sharing, dual charge pump, power efficiency, 
 Summary | Full Text:PDF
An Energy Efficiency 4-bit Multiplier with Two-Phase Non-overlap Clock Driven Charge Recovery Logic
Yimeng ZHANG Leona OKAMURA Tsutomu YOSHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 605-612
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
adiabatic logic, boost logic, low energy dissipation, pipeline multiplier, 
 Summary | Full Text:PDF