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IEICE Trans

Yasutaka MATSUDA


Reducing Energy Consumption of Wakeup Logic through Double-Stage Tag Comparison
Yasutaka MATSUDA Ryota SHIOYA Hideki ANDO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2022/02/01
Vol. E105-D  No. 2  pp. 320-332
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
microprocessorsuperscalar processorinstruction-level parallelismissue queuepower consumption
 Summary | Full Text:PDF