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IEICE Trans

Yasuhiro MITSUI

VLSI-Oriented Multiple-Valued Current-Mode Arithmetic Circuits Using Redundant Number Representations
Shoji KAWAHITO Yasuhiro MITSUI Tetsuro NAKAMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/03/25
Vol. E76-C  No. 3  pp. 446-454
Type of Manuscript:  Special Section PAPER (Special Issue on Multiple-Valued Integrated Circuits)
Category: 
Keyword: 
multiple-valued logic, multiple-valued current-mode circuits, carry-propagation-free addition, high-speed arithmetic, VLSI, 
 Summary | Full Text:PDF