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IEICE Trans

Yasuaki IWASE

4-2 Compressor with Complementary Pass-Transistor Logic
Youji KANIE Yasushi KUBOTA Shinji TOYOYAMA Yasuaki IWASE Shuhei TSUCHIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/04/25
Vol. E77-C  No. 4  pp. 647-649
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
electronic circuits, multiplier, regularly structured Wallace tree, 4-2 compressor, complementary pass-transistor logic, 
 Summary | Full Text:PDF
Alternately-Activated Open Bitline Technique for High Density DRAMs
Yasushi KUBOTA Yasuaki IWASE Katsuji IGUCHI Junkou TAKAGI Toru WATANABE Keizo SAKIYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/10/25
Vol. E75-C  No. 10  pp. 1259-1266
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
DRAM bitline capacitance noise power, 
 Summary | Full Text:PDF
A Model for Pattern Recognition
Xiao-yan ZHU Yasuaki IWASE Takashi JIMBO Masayoshi UMENO 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1989/08/25
Vol. E72-E  No. 8  pp. 888-890
Type of Manuscript:  LETTER
Category: Image Processing, Computer Graphics and Pattern Recognition
Keyword: 
 Summary | Full Text:PDF