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IEICE Trans

Ya-Cheng LU

Concurrent Algorithm and Hardware Implementation for Low-Latency Turbo Decoder Using a Single MAP Decoder
Ya-Cheng LU Erl-Huei LU 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2010/01/01
Vol. E93-B  No. 1  pp. 1-8
Type of Manuscript:  PAPER
Category: Fundamental Theories for Communications
Keyword: 
concurrent decoding, turbo codes, maximum a posteriori (MAP), iterative decoding delay, low latency, 
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