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IEICE Trans

Toru OGAWA

A Reconfigurable Digital Signal Processor
Boon Keat TAN Toru OGAWA Ryuji YOSHIMURA Kenji TANIGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9  pp. 1424-1430
Type of Manuscript:  Special Section PAPER (Special Issue on Novel VLSI Processor Architectures)
Category: 
Keyword: 
DSP processor, reconfigurable, flexible, processors array, fault-tolerant, ASIC, digital signal processing, RISC, 
 Summary | Full Text:PDF