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IEICE Trans

Ting-Sheng CHAO

A Pseudo Fractional-N Clock Generator with 50% Duty Cycle Output
Wei-Bin YANG Yu-Lung LO Ting-Sheng CHAO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 309-316
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
fractional-N, clock generator, pseudo fractional-N controller, duty cycle, 
 Summary | Full Text:PDF
High-Speed and Ultra-Low-Voltage Divide-by-4/5 Counter for Frequency Synthesizer
Yu-Lung LO Wei-Bin YANG Ting-Sheng CHAO Kuo-Hsing CHENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/06/01
Vol. E92-C  No. 6  pp. 890-893
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
dynamic D flip-flops, counters, prescalers, ultra-low-voltage design, 
 Summary | Full Text:PDF