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IEICE Trans

Tetsuo TADA

Accomplishment of At-Speed BISR for Embedded DRAMs
Yoshihiro NAGURA Yoshinori FUJIWARA Katsuya FURUE Ryuji OHMURA Tatsunori KOMOIKE Takenori OKITAKA Tetsushi TANIZAKI Katsumi DOSAKA Kazutami ARIMOTO Yukiyoshi KODA Tetsuo TADA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/10/01
Vol. E85-D  No. 10  pp. 1498-1505
Type of Manuscript:  Special Section PAPER (Special Issue on Test and Verification of VLSI)
Category: BIST
Keyword: 
at-speed test, BISR, embedded DRAM, test cost reduction, 
 Summary | Full Text:PDF