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IEICE Trans

Tetsuaki UTSUMI

A Semi-Synchronous Circuit Design Method by Clock Tree Modification
Seiichiro ISHIJIMA Tetsuaki UTSUMI Tomohiro OTO Atsushi TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A  No. 12  pp. 2596-2602
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Design
Keyword: 
semi-synchronous circuit, clock tree, MIPS processor, 
 Summary | Full Text:PDF