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IEICE Trans

Tetsuaki NAKAMIKAWA

Quad-Processor Redundancy for a RISC-Based Fault Tolerant Computer
Shinichiro YAMAGUCHI Tetsuaki NAKAMIKAWA Naoto MIYAZAKI Yuuichirou MORITA Yoshihiro MIYAZAKI Sakou ISHIKAWA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/01/25
Vol. E80-D  No. 1  pp. 15-20
Type of Manuscript:  Special Section PAPER (Special Issue on Fault-Tolerant Computing)
Category: Redundancy Techniques
Keyword: 
fault tolerance, fault tolerant computer, redundant system, dual system, high availability, UNIX, RISC, transaction processing, open system, 
 Summary | Full Text:PDF