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IEICE Trans

Takeshi HIGASHIMURA

High-Level Synthesis for Weakly Testable Data Paths
Michiko INOUE Kenji NODA Takeshi HIGASHIMURA Toshimitsu MASUZAWA Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1998/07/25
Vol. E81-D  No. 7  pp. 645-653
Type of Manuscript:  Special Section PAPER (Special Issue on Test and Diagnosis of VLSI)
Category: Test Synthesis
Keyword: 
high-level synthesis, testability, sequential ATPG, non-scan design, 
 Summary | Full Text:PDF