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IEICE Trans

Takeo MATSUKI

Gate-Last MISFET Structures and Process for Characterization of High-k and Metal Gate MISFETs
Takeo MATSUKI Kazuyoshi TORII Takeshi MAEDA Yasushi AKASAKA Kiyoshi HAYASHI Naoki KASAI Tsunetoshi ARIKADO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/05/01
Vol. E88-C  No. 5  pp. 804-810
Type of Manuscript:  Special Section PAPER (Special Section on Microelectronic Test Structures)
Category: 
Keyword: 
MOSFET, high-k, metal-gate, gate-last, 
 Summary | Full Text:PDF
0.15 µm CMOS Devices with Reduced Junction Capacitance
Akira TANABE Kiyoshi TAKEUCHI Toyoji YAMAMOTO Takeo MATSUKI Takemitsu KUNIO Masao FUKUMA Ken NAKAJIMA Naoki AIZAKI Hidenobu MIYAMOTO Eiji IKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/03/25
Vol. E78-C  No. 3  pp. 267-273
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies)
Category: 
Keyword: 
CMOS, EB lithography, Ti salicide, SPICE, 
 Summary | Full Text:PDF