Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2024/08/01 Vol. E107-DNo. 8pp. 940-948 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Keyword: reversible logic circuits, Toffoli gates, lower bound, logic minimization,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2023/09/01 Vol. E106-ANo. 9pp. 1082-1091 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Algorithms and Data Structures Keyword: enumeration algorithm, reverse search, simple polygon, empty polygon, surrounding polygon,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2022/03/01 Vol. E105-DNo. 3pp. 466-473 Type of Manuscript: Special Section PAPER (Special Section on Foundations of Computer Science - New Trends of Theory of Computation and Algorithm -) Category: Keyword: enumeration algorithm, 2-edge-connected induced subgraph, reverse search, polynomial delay,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2014/09/01 Vol. E97-DNo. 9pp. 2253-2261 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Reversible/Quantum Computing Keyword: reversible logic circuits, Toffoli gates, lower bound, logic minimization,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/03/25 Vol. E80-ANo. 3pp. 567-570 Type of Manuscript: Special Section LETTER (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems) Category: Keyword: logic synthesis, AND-EXOR expression, symmetric function, logic minimization algorithm,