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IEICE Trans

Taichi KATAYAMA

FPGA Implementation of a Stream-Based Real-Time Hardware Line Segment Detector
Taito MANABE Taichi KATAYAMA Yuichiro SHIBATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2022/03/01
Vol. E105-A  No. 3  pp. 468-477
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
line detection, stream processing, FPGA, real-time, 
 Summary | Full Text:PDF