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IEICE Trans

Surachai THONGKAEW

Register-Based Process Virtual Machine Acceleration Using Hardware Extension with Hybrid Execution
Surachai THONGKAEW Tsuyoshi ISSHIKI Dongju LI Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/12/01
Vol. E98-A  No. 12  pp. 2505-2518
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
register-base VM acceleration, dalvik VM acceleration, HW/SW co-designed VM, dynamic languages, 
 Summary | Full Text:PDF