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IEICE Trans

Srinivas DEVADAS

Automatic Generation and Verification of Sufficient Correctness Properties of Synchornous Array Processors
Stan Y. LIAO Srinivas DEVADAS 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/09/25
Vol. E76-D  No. 9  pp. 1030-1038
Type of Manuscript:  INVITED PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: Design Verification
Keyword: 
formal verification, automata, language, and theory of computing, hardware and disign, 
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