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IEICE Trans

Shuji FUKAGAWA

A Low-Voltage 42.4 G-BPS Single-Ended Read-Modify-Write Bus and Programmable Page-Size on a 3D Frame-Buffer
Kazunari INOUE Hideaki ABE Kaori MORI Shuji FUKAGAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/02/25
Vol. E83-C  No. 2  pp. 195-204
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
Category: 
Keyword: 
frame-buffer, embedded-DRAM, 3D, high bandwidth, 
 Summary | Full Text:PDF