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IEICE Trans

Sho OGATA

A Multi-Context FPGA Using Floating-Gate-MOS Functional Pass-Gates
Masanori HARIYAMA Sho OGATA Michitaka KAMEYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11  pp. 1655-1661
Type of Manuscript:  Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
time-multiplexed FPGA, dynamically reconfigurable architecture, DPGA, bit-serial architecture, 
 Summary | Full Text:PDF