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IEICE Trans

Shawn CHANG


Design and Impact on ESD/LU Immunities by Drain-Side Super-Junction Structures in Low-(High-)Voltage MOSFETs for the Power Applications
Shen-Li CHEN Yu-Ting HUANG Shawn CHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2018/03/01
Vol. E101-C  No. 3  pp. 143-150
Type of Manuscript:  PAPER
Category: Electromagnetic Theory
Keyword: 
electrostatic discharge (ESD)holding voltage (Vh)n-channel lateral-diffused MOSFET (nLDMOS)secondary breakdown current (It2)super-junction (SJ)trigger voltage (Vt1)
 Summary | Full Text:PDF