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IEICE Trans

Sayaka MATSUNAGA

Development of an IP Library of IEEE-754-Standard Single-Precision Floating-Point Dividers
Hiroyuki OCHI Tatsuya SUZUKI Sayaka MATSUNAGA Yoichi KAWANO Takao TSUDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 3020-3027
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: IP Design
Keyword: 
SRT method, restoring method, performance-area ratio, performance-power ratio, 
 Summary | Full Text:PDF