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IEICE Trans

Satoshi KANDA

Design and Implementation of 176-MHz WXGA 30-fps Real-Time Optical Flow Processor
Yu SUZUKI Masato ITO Satoshi KANDA Kousuke IMAMURA Yoshio MATSUDA Tetsuya MATSUMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2017/12/01
Vol. E100-A  No. 12  pp. 2888-2900
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
optical flow, HOE algorithm, SOR, FPGA, processor, 
 Summary | Full Text:PDF