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IEICE Trans

Ryuusuke KAWANO

A 15-Gbit/s Si-Bipolar Gate Array
Ryuusuke KAWANO Minoru TOGASHI Chikara YAMAGUCHI Yoshiji KOBAYASHI Masao SUZUKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/09/25
Vol. E78-C  No. 9  pp. 1203-1209
Type of Manuscript:  Special Section PAPER (Special Issue on Ultra-High-Speed Electron Devices)
Category: 
Keyword: 
decision circuit, 4 : 1 multiplexer, temperature-compensated output buffer, SST-1C, 
 Summary | Full Text:PDF