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IEICE Trans

Ryotaro KOBAYASHI

Improvement of Data Utilization Efficiency for Cache Memory by Compressing Frequent Bit Sequences
Ryotaro KOBAYASHI Ikumi KANEKO Hajime SHIMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/08/01
Vol. E99-C  No. 8  pp. 936-946
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
cache memory, low power, frequent bit sequences, 
 Summary | Full Text:PDF
BTB Energy Reduction by Focusing on Useless Accesses
Yoshio SHIMOMURA Hiroki YAMAMOTO Hayato USUI Ryotaro KOBAYASHI Hajime SHIMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/07/01
Vol. E98-C  No. 7  pp. 569-579
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
Branch Target Buffer, branch prediction, energy reduction, 
 Summary | Full Text:PDF