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IEICE Trans

Rompei SUGAWARA

A 12-bit 1.25MS/s Area-Efficient Radix-Value Self-Estimated Non-Binary Cyclic ADC with Relaxed Requirements on Analog Components
Hao SAN Rompei SUGAWARA Masao HOTTA Tatsuji MATSUURA Kazuyuki AIHARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2017/02/01
Vol. E100-A  No. 2  pp. 534-540
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
cyclic ADC, non-binary ADC, radix-value estimation algorithm, β-expansion, multiply-by-β MDAC., 
 Summary | Full Text:PDF
Experimental Implementation of Non-binary Cyclic ADCs with Radix Value Estimation Algorithm
Rompei SUGAWARA Hao SAN Kazuyuki AIHARA Masao HOTTA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4  pp. 308-315
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
Non-binary ADC, Cyclic ADC, Radix value estimation algorithm, β expansion, Multiply-by-β MDAC, 
 Summary | Full Text:PDF