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IEICE Trans

Rintaro IMAI

Area-Efficient Reconfigurable Architecture for Media Processing
Yukio MITSUYAMA Kazuma TAKAHASHI Rintaro IMAI Masanori HASHIMOTO Takao ONOYE Isao SHIRAKAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A  No. 12  pp. 3651-3662
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
reconfigurable, media processing, multi-standard, area-efficiency, dynamic reconfiguration, 
 Summary | Full Text:PDF