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IEICE Trans

Nobuyuki YAMASAKI

Non-Stop Microprocessor for Fault-Tolerant Real-Time Systems
Shota NAKABEPPU Nobuyuki YAMASAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2023/07/01
Vol. E106-C  No. 7  pp. 365-381
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
non-volatile flip-flop, non-volatile memory, embedded real-time system, fault-tolerant system, microprocessor architecture, 
 Summary | Full Text:PDF
Codeword Set Selection for the Error-Correcting 4b/10b Line Code with Maximum Clique Enumeration
Masayuki TAKEDA Nobuyuki YAMASAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2020/10/01
Vol. E103-A  No. 10  pp. 1227-1233
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: communication
Keyword: 
4b/10b, NP-hard, maximum clique enumeration, 
 Summary | Full Text:PDF
Analysis of Body Bias Control Using Overhead Conditions for Real Time Systems: A Practical Approach
Carlos Cesar CORTES TORRES Hayate OKUHARA Nobuyuki YAMASAKI Hideharu AMANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2018/04/01
Vol. E101-D  No. 4  pp. 1116-1125
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
silicon-on-insulator, SOTB, body bias, low power design, time-overhead, energy-overhead, 
 Summary | Full Text:PDF
An Integrated Approach for Implementing Imprecise Computations
Hidenori KOBAYASHI Nobuyuki YAMASAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/10/01
Vol. E86-D  No. 10  pp. 2040-2048
Type of Manuscript:  Special Section PAPER (Special Issue on Development of Advanced Computer Systems)
Category: 
Keyword: 
real-time systems, imprecise computation model, operating systems, scheduling algorithms, 
 Summary | Full Text:PDF