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IEICE Trans

Meiting XUE

A General Scheme for Solving Device Heterogeneity in Consistent Hash Algorithms
Meiting XUE Jinbo ZHANG Yixuan ZHANG Huan ZHANG Chenpu LI Bei ZHAO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2025/11/01
Vol. E108-A  No. 11  pp. 1461-1470
Type of Manuscript:  PAPER
Category: Algorithms and Data Structures
Keyword: 
consistent hash, load balancing, heterogeneous resources, distributed systems, 
 Summary | Full Text:PDF
High-Parallelism and Pipelined Architecture for Accelerating Sort-Merge Join on FPGA
Meiting XUE Wenqi WU Jinfeng LUO Yixuan ZHANG Bei ZHAO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2024/10/01
Vol. E107-A  No. 10  pp. 1582-1594
Type of Manuscript:  PAPER
Category: Algorithms and Data Structures
Keyword: 
FPGA-based acceleration, database, join operation, sort, 
 Summary | Full Text:PDF
Dual Cuckoo Filter with a Low False Positive Rate for Deep Packet Inspection
Yixuan ZHANG Meiting XUE Huan ZHANG Shubiao LIU Bei ZHAO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2023/08/01
Vol. E106-A  No. 8  pp. 1037-1042
Type of Manuscript:  PAPER
Category: Algorithms and Data Structures
Keyword: 
Cuckoo hashing, deep packet inspection, parallel pipelined, 
 Summary | Full Text:PDF
Resource Efficient Top-K Sorter on FPGA
Binhao HE Meiting XUE Shubiao LIU Feng YU Weijie CHEN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2022/09/01
Vol. E105-A  No. 9  pp. 1372-1376
Type of Manuscript:  LETTER
Category: Digital Signal Processing
Keyword: 
field programmable gate array (FPGA), top-K sorting, hardware acceleration, continuous variable-length sequences, 
 Summary | Full Text:PDF
Sorting Matrix Architecture for Continuous Data Sequences
Meiting XUE Huan ZHANG Weijun LI Feng YU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2020/02/01
Vol. E103-A  No. 2  pp. 542-546
Type of Manuscript:  LETTER
Category: Algorithms and Data Structures
Keyword: 
data sorting, variable-width, variable-length, hardware design, pipeline and parallel, 
 Summary | Full Text:PDF