Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2024/03/01 Vol. E107-ANo. 3pp. 583-591 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Design Technology and CAD Keyword: logic locking, register transfer level, SAT attack, FALL attack, design for security, controller,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2017/12/01 Vol. E100-ANo. 12pp. 2824-2833 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: transition faults, correlation, capture power reduction, X-filling, SAT,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2013/09/01 Vol. E96-DNo. 9pp. 1994-2002 Type of Manuscript: Special Section PAPER (Special Section on Dependable Computing) Category: Keyword: X-bit, don't care identification, X-bit distribution, test compaction,