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IEICE Trans

Masato TATSUOKA

Optimization Methods during RTL Conversion from Synchronous RTL Models to Asynchronous RTL Models
Shogo SEMBA Hiroshi SAITO Masato TATSUOKA Katsuya FUJIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2020/12/01
Vol. E103-A  No. 12  pp. 1417-1426
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
asynchronous circuits, RTL conversion, area and dynamic power optimization, operand isolation, 
 Summary | Full Text:PDF
High Level Congestion Detection from C/C++ Source Code for High Level Synthesis
Masato TATSUOKA Mineo KANEKO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2020/12/01
Vol. E103-A  No. 12  pp. 1437-1446
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
wire congestion, high level synthesis, source code compiler, LLVM, 
 Summary | Full Text:PDF