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IEICE Trans

Masato FUJINAGO

3-D Topography and Impurity Integrated Process Simulator (3-D MIPS) and Its Applications
Masato FUJINAGO Tatsuya KUNIKIYO Tetsuya UCHIDA Eiji TSUKUDA Kenichiro SONODA Katsumi EIKYU Kiyoshi ISHIKAWA Tadashi NISHIMURA Satoru KAWAZU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/06/25
Vol. E82-C  No. 6  pp. 848-861
Type of Manuscript:  Special Section PAPER (Special Issue on TCAD for Semiconductor Industries)
Category: 
Keyword: 
LSI fabrication, process simulator, topography, impurity diffusion, segregation, capacitance, 
 Summary | Full Text:PDF