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IEICE Trans

Masanori YAMAMURA

Hardware Implementation of the High-Dimensional Discrete Torus Knot Code
Yuuichi HAMASUNA Masanori YAMAMURA Toshio ISHIZAKA Masaaki MATSUO Masayasu HATA Ichi TAKUMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/04/01
Vol. E84-A  No. 4  pp. 949-956
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals of Information and Communications)
Category: 
Keyword: 
robust and high speed error correction, burst error, wired logic and parallel operation, ASIC, 
 Summary | Full Text:PDF