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IEICE Trans

Masakazu MATSUGU

An Image-Filtering LSI Processor Architecture for Face/Object Recognition Using a Sorted Projection-Field Model Based on a Merged/Mixed Analog-Digital Architecture
Osamu NOMURA Takashi MORIE Keisuke KOREKADO Teppei NAKANO Masakazu MATSUGU Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/06/01
Vol. E89-C  No. 6  pp. 781-791
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
object detection/recognition, convolutional neural network, image-filtering, multiply-and-accumulation operation, LSI architecture, 
 Summary | Full Text:PDF