Novel Multiple-Valued Logic Design Using BiCMOS-Based Negative Differential Resistance Circuit Biased by Two Current Sources Kwang-Jow GANDong-Shong LIANGYan-Wun CHEN
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/08/01 Vol. E93-DNo. 8pp. 2068-2072 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Multiple-Valued VLSI Technology Keyword: multiple-valued logic, negative differential resistance, BiCMOS process,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/05/01 Vol. E92-CNo. 5pp. 635-638 Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices) Category: Keyword: negative differential resistance (NDR), MOS, HBT, BiCMOS,