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IEICE Trans

Kimihisa AIHARA

A Sparse Memory Access Architecture for Digital Neural Network LSIs
Kimihisa AIHARA Osamu FUJITA Kuniharu UCHIMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/07/25
Vol. E80-C  No. 7  pp. 996-1002
Type of Manuscript:  Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs)
Category: Neural Networks and Chips
Keyword: 
neural network, digital LSI, perceptron, data-driven, 
 Summary | Full Text:PDF