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IEICE Trans

Keisuke IDE

Dynamically Reconfigurable Processor Implemented with IPFlex's DAPDNA Technology
Takayuki SUGAWARA Keisuke IDE Tomoyoshi SATO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/08/01
Vol. E87-D  No. 8  pp. 1997-2003
Type of Manuscript:  INVITED PAPER (Special Section on Reconfigurable Systems)
Category: 
Keyword: 
dynamically reconfigurable processor, coarse-grain processing element, heterogeneous two-dimensional array, spatial computing, temporal computing, 
 Summary | Full Text:PDF