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IEICE Trans

Kazuki YAMAMOTO

Local Memory Mapping of Multicore Processors on an Automatic Parallelizing Compiler
Yoshitake OKI Yuto ABE Kazuki YAMAMOTO Kohei YAMAMOTO Tomoya SHIRAKAWA Akimasa YOSHIDA Keiji KIMURA Hironori KASAHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2020/03/01
Vol. E103-C  No. 3  pp. 98-109
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
parallelization compiler, local memory management, multicore processor, global address space, data decomposition, 
 Summary | Full Text:PDF