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IEICE Trans

Kazuhiro SATOH

An Integrated Timing and Dynamic Supply Noise Verification for Multi-10-Million Gate SoC Designs
Kenji SHIMAZAKI Makoto NAGATA Mitsuya FUKAZAWA Shingo MIYAHARA Masaaki HIRATA Kazuhiro SATOH Hiroyuki TSUJIKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11  pp. 1535-1543
Type of Manuscript:  Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
power-supply noise, ground noise, noise detector, dynamic IR drop, timing analysis, 
 Summary | Full Text:PDF