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IEICE Trans

Kasuaki YOSHIOKA

NAND Phase Change Memory with Block Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance
Koh JOHGUCHI Kasuaki YOSHIOKA Ken TAKEUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4  pp. 351-359
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
phase change memory, non-volatile memory, storage class memory, block erase interface, solid-state drive, 
 Summary | Full Text:PDF