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IEICE Trans

Kasidit TOPRASERTPONG

Write Variation & Reliability Error Compensation by Layer-Wise Tunable Retraining of Edge FeFET LM-GA CiM
Shinsei YOSHIKIYO Naoko MISAWA Kasidit TOPRASERTPONG Shinichi TAKAGI Chihiro MATSUI Ken TAKEUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2023/07/01
Vol. E106-C  No. 7  pp. 352-364
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
Computation-in-Memory, FeFET, error compensation, retraining, reliability error, 
 Summary | Full Text:PDF