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IEICE Trans

Junji HIRASE

LATID (Large-Angle-Tilt Implanted Drain) FETs with Buried n- Profile for Deep-Submicron ULSIs
Junji HIRASE Takashi HORI Yoshinori ODAKE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/03/25
Vol. E77-C  No. 3  pp. 350-354
Type of Manuscript:  Special Section PAPER (Special Issue on Quarter Micron Si Device and Process Technologies)
Category: Device Technology
Keyword: 
MOSFET, LDD, n--gate overlap, circuit speed, hot-carrier-induced degradation, 
 Summary | Full Text:PDF